1. Field
One or more embodiments described herein relate to memory devices.
2. Description of the Related Art
In a process of manufacturing a vertical non-volatile memory device, an insulation layer and a sacrificial layer may be alternately and repeatedly formed on a substrate. Holes may be formed through the insulation layers and the sacrificial layers, and oxide/nitride/oxide (ONO) layers and channels filling the holes may be formed. An opening may be formed through the insulation layers and the sacrificial layers, and the sacrificial layers exposed by the opening may be removed to form a gap exposing the channel. A gate electrode may be formed to fill the gap.